Software Simulation of Unequal Error Protection Based Demodulator (Burst Mode) for Onboard Application

This paper describes the algorithm and implementation details of a new DSP based 64 Kbps Demodulator developed for onboard application. This demodulator has the capability of unequal error protection (UEP) based on multiple block coded modulation (MBCM). The software is run on ADSP-21020 simulator and MATLAB. The demodulator is tested by comparing the results of DSP simulation with original modulating Burst sequence baseband data. The test results are presented in the paper. KeywordsPrototype modem; UEP; MBCM;BER,Eb/No. I.INTRODUCTION In this paper, we describe a prototype demodulator which has the capability of unequal error protection (UEP) based on multiple block coded modulation (MBCM) [1]. In many applications, the transmitted data bits can be classified as the more important bits (MIB) and the less important bits (LIB) in terms of their sensitivity to channel errors. The basic task of UEP is to provide a smaller bit error rate (BER) for MIB than that for LIB [2, 3]. One advantage of using MBCM is that UEP can be achieved without compromising the performance of LIB and using only one channel encoder/decoder. The new generation of satellite communication systems with regenerative transponders promise substantial benefits in overall system engineering. In this scheme, the uplink signal is demodulated onboard to recover the baseband data. Then a carrier is remodulated with the data, upconverted, amplified and transmitted as downlink. This requires the use of an on-board QPSK demodulator. For this purpose, a 64 Kbps QPSK demodulator for Burst mode[4,5,6,7,8] has been developed at Space Applications Centre, ISRO, Ahmedabad, using digital signal processing techniques. The major applications of UEP in our applications is detection of unique word(UW), which will be used to recognized the start of the burst data. II.SPECIFICATIONS The Table-1 gives overall specifications of the demodulator. The Table-2 gives the specifications used for the hardware platform. The Table-3 gives the specifications used for the implementation of algorithm based on digital signal processing techniques. Table – 1 Overall Specifications of demodulator Transmission data rate 64 Kbps Input IF signal frequency 455 KHz